The present invention relates to a circuit arrangement of the type including data switches and a memory for storing representations of values representative of the positions, or settings, of the data switches.
In a known circuit arrangement of this type, as disclosed in German Auslegeschrift [Published Application] No. 2,723,777, a plurality of data switches are combined into an input pad and each serves for generating a binary coded signal which is fed into a memory. However, in order to bring this signal to the desired location, or address, in the memory, further address selection switches are provided which are associated with respective memory addresses. Only by actuating the data switches and the selection switches can a selected signal representation be introduced into the memory. The number of signal representations that can be put in is here determined by the number of data switches provided.